Cheng-En Tsai

Work Experience

  1. Google

    Hardware Engineering Intern

    Google New Taipei City, Taiwan
    • Developed a Python-based automation tool for schematic and layout review, surpassing Cadence's Electrical Rule Checker (ERC) with customizable rule checks, signal integrity diagnostics, and an intuitive PyQt5-powered GUI.
    • Implemented advanced features including In-Board Measuring Point analysis aligned with Intel AIBC standards, automated derating checks, and design comparison, significantly reducing manual review time.
    • Enabled compatibility with Cadence Allegro PCB Editor via Extracta and Design Entry HDL, showcasing adaptability across industry-standard EDA tools for schematic and board-level design.
  2. NTU

    Teaching Assistant

    Quantum Information and Computation (COMME5061) National Taiwan University
    Instructor: Prof. Hao-Chung Cheng
    • Assisted in teaching quantum information theory and quantum computation fundamentals to undergraduate students.
    • Conducted tutorial sessions and provided guidance on quantum algorithms and quantum circuit design.
    • Graded assignments and provided feedback on quantum programming exercises and theoretical problems.
  3. NTU

    Teaching Assistant

    Cornerstone EECS Design and Implementation (EE1006) National Taiwan University
    Instructor: Prof. Ho-Lin Chen and Prof. Chia-Yi Yeh
    • Supported students in foundational EECS design projects and implementation challenges.
    • Provided technical guidance on hardware design, software development, and system integration.
    • Mentored students through hands-on projects and design thinking methodologies.